半导体装置

Abstract

半导体装置。本发明提供ESD耐量高的半导体装置。第一过孔(16)用于使焊盘(22)与ESD保护电路的NMOS晶体管的漏极电连接。在焊盘(22)下方,仅在矩形环状的中间层金属膜(17)的一边和与该一边相对的另一边设置有该第一过孔(16)。即,用于与漏极电连接的所有第一过孔(16)大致存在于焊盘(22)的正下方。由此,对焊盘(22)施加的ESD的浪涌电流容易均匀地流向全部漏极。这样,ESD保护电路的NMOS晶体管的各个沟道容易统一地进行动作,半导体装置的ESD耐量变高。
Provided is a semiconductor device having high ESD tolerance. A first via (16) is used for electrically connecting a pad (22) to a drain of an NMOS transistor of an ESD protective circuit. The first vias (16) are formed under the pad (22) only on one side of a rectangular ring-shaped intermediate metal film (17) and on another side thereof opposed to the one side. In other words, all the first vias (16) for establishing an electrical connection to the drains are present substantially directly under the pad (22). Consequently, a surge current caused by ESD and applied to the pad (22) is more likely to flow uniformly among all the drains. Then, respective channels of the NMOS transistor of the ESD protective circuit are more likely to uniformly operate, and hence the ESD tolerance of the semiconductor device is increased.

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